IRx¶

IRx aims to provide a translator to LLVM-IR from ASTx objects.

Getting Started¶

First, check our documentation about the installation.

Now, let's import our library:

In [1]:

import astx
from irx.builders.llvmliteir import LLVMLiteIR

import astx from irx.builders.llvmliteir import LLVMLiteIR

In [2]:

builder = LLVMLiteIR()
module = builder.module()

decl_a = astx.VariableDeclaration(name="a", type_=astx.Int32(), value=astx.LiteralInt32(1))
decl_b = astx.VariableDeclaration(name="b", type_=astx.Int32(), value=astx.LiteralInt32(2))
decl_c = astx.VariableDeclaration(name="c", type_=astx.Int32(), value=astx.LiteralInt32(4))

a = astx.Identifier(name="a")
b = astx.Identifier(name="b")
c = astx.Identifier(name="c")

lit_1 = astx.LiteralInt32(1)

basic_op = lit_1 + b - a * c / a + (b - a + c / a)

main_proto = astx.FunctionPrototype(
    name="main", args=astx.Arguments(), return_type=astx.Int32()
)
main_block = astx.Block()
main_block.append(decl_a)
main_block.append(decl_b)
main_block.append(decl_c)
main_block.append(astx.FunctionReturn(basic_op))
main_fn = astx.FunctionDef(prototype=main_proto, body=main_block)

module.block.append(main_fn)

builder = LLVMLiteIR() module = builder.module() decl_a = astx.VariableDeclaration(name="a", type_=astx.Int32(), value=astx.LiteralInt32(1)) decl_b = astx.VariableDeclaration(name="b", type_=astx.Int32(), value=astx.LiteralInt32(2)) decl_c = astx.VariableDeclaration(name="c", type_=astx.Int32(), value=astx.LiteralInt32(4)) a = astx.Identifier(name="a") b = astx.Identifier(name="b") c = astx.Identifier(name="c") lit_1 = astx.LiteralInt32(1) basic_op = lit_1 + b - a * c / a + (b - a + c / a) main_proto = astx.FunctionPrototype( name="main", args=astx.Arguments(), return_type=astx.Int32() ) main_block = astx.Block() main_block.append(decl_a) main_block.append(decl_b) main_block.append(decl_c) main_block.append(astx.FunctionReturn(basic_op)) main_fn = astx.FunctionDef(prototype=main_proto, body=main_block) module.block.append(main_fn)

In [3]:

module

module

Out[3]:

In [4]:

print(builder.translate(module))

print(builder.translate(module))

; ModuleID = "Arx"
target triple = "unknown-unknown-unknown"
target datalayout = ""

declare i32 @"putchar"(i32 %".1")

define i32 @"putchard"(i32 %".1")
{
entry:
  %".3" = call i32 @"putchar"(i32 %".1")
  ret i32 0
}

define i32 @"main"()
{
entry:
  %"c" = alloca i32
  %"b" = alloca i32
  %"a" = alloca i32
  store i32 1, i32* %"a"
  store i32 2, i32* %"b"
  store i32 4, i32* %"c"
  %"b.1" = load i32, i32* %"b"
  %"addtmp" = add i32 1, %"b.1"
  %"a.1" = load i32, i32* %"a"
  %"c.1" = load i32, i32* %"c"
  %"multmp" = mul i32 %"a.1", %"c.1"
  %"a.2" = load i32, i32* %"a"
  %"divtmp" = sdiv i32 %"multmp", %"a.2"
  %"subtmp" = sub i32 %"addtmp", %"divtmp"
  %"b.2" = load i32, i32* %"b"
  %"a.3" = load i32, i32* %"a"
  %"subtmp.1" = sub i32 %"b.2", %"a.3"
  %"c.2" = load i32, i32* %"c"
  %"a.4" = load i32, i32* %"a"
  %"divtmp.1" = sdiv i32 %"c.2", %"a.4"
  %"addtmp.1" = add i32 %"subtmp.1", %"divtmp.1"
  %"addtmp.2" = add i32 %"subtmp", %"addtmp.1"
  ret i32 %"addtmp.2"
}